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general description the max8654 high-efficiency switching regulator delivers up to 8a of load current at output voltages from 0.6v to 0.85 x v in . the ic operates from 4.5v to 14v, making it ideal for on-board point-of-load and postregulation appli- cations, with total output error less than 1% over load, line, and temperature ranges. the max8654 is a fixed-frequency pwm mode regulator with a switching frequency range of 250khz to 1.2mhz set by an external resistor or sync input. high-frequency operation allows for an all-ceramic-capacitor solution. a syncout output is provided to synchronize a second regulator switching 180 out-of-phase with the first to reduce the input ripple current and consequently reduce the required input capacitance. the high operating fre- quency minimizes the size of external components. the on-board low r ds(on) dual-nmos design keeps the board cooler at heavy loads while minimizing the critical inductances, making the layout a much simpler task with respect to the discrete solutions. the max8654 comes with a high-bandwidth (20mhz) voltage-error amplifier. the voltage-mode control archi- tecture and the op-amp voltage-error amplifier permit a type 3 compensation scheme to be utilized to achieve maximum loop bandwidth, up to 20% of the switching frequency. high loop bandwidth achieves fast transient response resulting in less output capacitance required. the max8654 offers programmable soft-start to accom- modate different types of output capacitors and reduce input inrush current. the max8654 is available in a 36- lead tqfn package. applications features internal 26m ? r ds(on) mosfets guaranteed 8a output current adjustable overcurrent protection 1% output accuracy over temperature operates from 4.5v to 14v supply adjustable output from 0.6v to 0.85 x v in soft-start reduces inrush supply current 250khz to 1.2mhz adjustable switching or sync input compatible with ceramic, polymer, and electrolytic output capacitors syncout synchronizes 2nd regulator 180 out-of-phase 36-pin, lead-free, 6mm x 6mm tqfn package max8654 12v, 8a 1.2mhz step-down regulator ________________________________________________________________ maxim integrated products 1 ordering information max8654 in vp bst vdl input 4.5v to 14v output up to 8a lx en pgnd comp fb sync syncout pwrgd gnd vl vl ilim refin ss freq in vl typical operating circuit 19-0588; rev 3; 6/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configuration appears at end of data sheet. evaluation kit available part temp range pin- package MAX8654ETX+ -40 c to +85 c 36 tqfn-ep* pol power supplies servers ddr memory raid power supplies network power supplies graphic cards + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad.
max8654 12v, 8a 1.2mhz step-down regulator 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in = v en = v vp = 12v, v vdl = 5v, v vl = 3.3v, v sync = 0v, v fb = 0.5v, t a = -40? to +85? , typical values are at t a = +25c, unless otherwise noted.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. sync, vl, pwrgd to gnd...................................-0.3v to +4.5v syncout, comp, ss, fb, refin, ilim, freq to gnd .....................-0.3v to (v vl + 0.3v) vdl to pgnd............................................................-0.3v to +6v vp, in, en to gnd..................................................-0.3v to +16v lx current (note 1: -12a to +12a) bst to lx .-0.3v to +6v bst to gnd ..-0.3v to (v in + 6v) en to vp and in-0.3v to (v in + 0.3v) pgnd to gnd .......................................................-0.3v to +0.3v continuous power dissipation (t a = +70c) 36-pin tqfn (derate 35.7mw/c above +70c) .........2857.1mw operating temperature range ...........................-40c to +85c junction temperature .......+150c storage temperature range .............................-65c to +150c thermal resistance junction to exposed pad (ep)...........3c/w lead temperature (soldering, 10s) .................................+300c soldering temperature (reflow) .......................................+260c note 1: lx has internal clamp diodes to pgnd and in. applications that forward bias these diodes should take care not to exceed the ics package power-dissipation limits. parameter conditions min typ max units in/vp in and vp voltage range 4.5 14 v vdl voltage range vp = vdl 4.5 5.5 v vl output voltage i vl = 5ma 3.3 v vdl output voltage i vdl = 50ma 5 v not switching, no load 2.7 v in = 12v 45 in + vp supply current f s = 500khz, no load, l = 1.5h v in = 4.5v 28 ma vl supply current f s = 500khz, v vl = 3.8v from separate supply 1.6 ma vdl supply current f s = 500khz, v vdl = 5.5v from separate supply 25 ma in + vp shutdown current v p = v in = 13.2v, v en = v vdl = v vl = unconnected 10 20 a v vl rising 3 3.1 vl undervoltage lockout threshold lx starts/stops switching, 2s rising/falling edge deglitch v vl falling 2.8 2.9 v v in rising 4.4 vdl and in undervoltage lockout threshold lx starts/stops switching, 3s rising/falling edge deglitch v in falling 3.8 v bst bst shutdown supply current v en = 0v, v in = v vp = v bst = v vdl = 5v 10 a pwm comparator pwm comparator propagation delay 5mv overdrive 16 ns comp comp clamp voltage, high 1.8 v comp slew rate 7 v/s comp shutdown resistance from comp to gnd, v en = 0v 7 ?
max8654 12v, 8a 1.2mhz step-down regulator _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = v en = v vp = 12v, v vdl = 5v, v vl = 3.3v, v sync = 0v, v fb = 0.5v, t a = -40? to +85? , typical values are at t a = +25?, unless otherwise noted.) parameter conditions min typ max units error amplifier fb regulation voltage vp = v in = 4.5v to 14v 0.594 0.6 0.606 v open-loop voltage gain 1k ? from comp to gnd 95 db error-amplifier unity-gain bandwidth parallel 10k ? , 160pf from comp to gnd 20 mhz error-amplifier common-mode input range 0 1.5 v error-amplifier maximum output current v comp = 1v 1 ma fb input bias current v fb = 0.6v -35 na refin refin input bias current v refin = 0.6v -60 na refin common-mode range 0 1.5 v lx (all pins combined) lx on-resistance, high side i lx = -180ma v bst - v lx = 5v 36 64 m ? lx on-resistance, low side i lx = 180ma 25 40 m ? sourcing 7 8 10 lx current-limit threshold r ilim = 100k ? sinking 7 8 10 a r ilim range 40 200 k ? v lx = 14v = v in +50 lx leakage current v en = 0v v lx = 0v, v in = 14v -50 ? r freq = 50k ? 0.85 1 1.1 lx switching frequency r freq = 100k ? 0.45 0.5 0.55 mhz r freq range 50 200 k ? lx minimum on-time 80 ns m axi m um rm s lx outp ut c ur r ent (note 2) 10.5 a en/ss en input logic-low threshold 0.6 v en input logic-high threshold 1.2 v v en = 0v -1 en input current v en = 14v 7 ? ss current v ss = 0.45v -10 -8 -6 ? refin discharge resistance 500 ? current-limit startup blanking 110 clock cycles restart time 900 clock cycles
max8654 12v, 8a 1.2mhz step-down regulator 4 _______________________________________________________________________________________ electrical characteristics (continued) (v in = v en = v vp = 12v, v vdl = 5v, v vl = 3.3v, v sync = 0v, v fb = 0.5v, t a = -40? to +85? , typical values are at t a = +25c, unless otherwise noted.) parameter conditions min typ max units sync sync capture range 0.25 1.20 mhz t lo 100 sync pulse width t hi 100 ns v il 0.4 sync input threshold v ih 1.6 v i il 10 na sync input current v sync = 0v or 3.6v i ih 7a syncout syncout frequency range 0.25 1.2 mhz syncout phase shift from syncin or internal oscillator frequency = 1mhz 170 180 190 degrees v oh v vl - 0.4 syncout output voltage i syncout = 1ma v ol 0.2 v thermal shutdown thermal-shutdown threshold when lx stops switching +165 c thermal-shutdown hysteresis 20 c power-good pwrgd threshold voltage v fb falling, 30mv hysteresis, v refin > 540mv 90 % of refin pwrgd falling edge deglitch 48 clock cycles pwrgd output voltage low i pwrgd = 4ma 0.03 0.06 v pwrgd leakage current v pwrgd = 5.5v, v fb = 0.9v 0.01 1 a note 2: all devices are production tested at t a = +25c. limits over the operating range are guaranteed by design.
max8654 12v, 8a 1.2mhz step-down regulator _______________________________________________________________________________________ 5 efficiency vs. load current max8654 toc01 output current (a) efficiency (%) 1 10 20 30 40 50 60 70 80 90 100 0 0.1 10 v in = 12v, v vdl = v vp = 5v, f s = 500khz v out = 1.8v v out = 3.3v v out = 5v efficiency vs. load current max8654 toc02 output current (a) efficiency (%) 1 10 20 30 40 50 60 70 80 90 100 0 0.1 10 v in = v vp = 5v, f s = 500khz v out = 1.8v v out = 3.3v efficiency vs. load current max8654 toc03 output current (a) efficiency (%) 1 10 20 30 40 50 60 70 80 90 100 0 0.1 10 v in = v vp = 12v, f s = 500khz v out = 1.8v v out = 3.3v v out = 5v reference voltage vs. temperature max8654 toc04 temperature ( c) reference voltage (v) 0.595 0.600 0.605 0.610 0.590 -50 -25 0 25 50 75 100 125 switching frequency vs. input voltage max8654 toc05 input voltage (v) switching frequency (khz) 200 600 400 1000 800 1200 0 57 9111315 switching frequency vs. r freq max8654 toc06 r freq (k ? ) switching frequency (khz) 200 800 600 400 1200 1000 1400 0 0 50 100 150 200 250 load regulation max8654 toc07 load current (a) output voltage change (%) -0.30 -0.15 -0.20 -0.25 -0.05 -0.10 0 -0.35 012345678 v out = 1.8v v out = 3.3v shutdown supply current vs. input voltage max8654 toc08 input voltage (v) shutdown supply current ( a) 1 6 5 4 3 2 9 8 7 10 0 02468101214 current limit vs. output voltage max8654 toc09 output voltage (v) current limit (a) 7.2 8.2 8.0 7.8 7.6 7.4 8.8 8.6 8.4 9.0 7.0 1.5 .2.0 2.5 3.0 3.5 typical operating characteristics (typical values are: v in = v vp = 12v, v out = 3.3v, r freq = 100k ? , and t a = +25c, circuit of figure 1.)
typical operating characteristics (continued) (typical values are: v in = v vp = 12v, v out = 3.3v, r freq = 100k ? , and t a = +25c, circuit of figure 1.) max8654 12v, 8a 1.2mhz step-down regulator 6 _______________________________________________________________________________________ exposed pad temperature vs. load current max8654 toc10 load current (a) exposed pad temperature ( c) -40 60 40 20 0 -20 120 100 80 140 -60 02 468 t a = +85 c, no air flow t a = +25 c, no air flow t a = -40 c, no air flow t a = -40 c, 200lfm t a = +25 c, 200lfm t a = +85 c, 200lfm line regulation max8654 toc11 input voltage (v) output voltage change (%) -0.3 -0.1 -0.2 0.1 0 0.2 -0.4 579111315 i load = 6a i load = 0a i load = 3a short-circuit response max8654 toc12 400 = rms input current during output short circuit max8654 toc13 input voltage (v) rms input current (a) 0.05 0.30 0.25 0.20 0.15 0.10 0.45 0.40 0.35 0.50 0 57 91113 v out = 3.3v c ss = 1000pf c ss = 22,000pf c ss = 10,000pf rms output current during output short circuit max8654 toc14 input voltage (v) rms output current (a) 2.5 2.0 1.5 3.5 3.0 4.0 1.0 57 91113 v out = 3.3v c ss = 1000pf c ss = 22,000pf c ss = 10,000pf open-loop frequency response max8654 toc15 frequency (khz) i out = 6a 106.57946khz c p i 106.57946khz c p i phase (deg) gain (db) -20 0 0 20 40 -40 10 1 0.1 1000 100 -83.3 83.3 166.6 -166.6 10 1 0.1 1000 100
load transient max8654 toc16 20 soft-start time vs. c ss max8654 toc17 c ss ( f) soft-start time (ms) 1 6 5 4 3 2 9 8 7 10 0 0 0.025 0.050 0.075 0.100 0.125 0.150 startup into a 0.5 ? load max8654 toc18 200 max8654 12v, 8a 1.2mhz step-down regulator _______________________________________________________________________________________ 7 soft-start with refin into a 0.5 ? load max8654 toc19 40 synchronized operation (no load) max8654 toc20 400ns/div v lx2 v lx1 i lx1 i lx2 10v/div 10mv/div 0v 0v 2a/div 2a/div typical operating characteristics (continued) (typical values are: v in = v vp = 12v, v out = 3.3v, r freq = 100k ? , and t a = +25c, circuit of figure 1.)
max8654 12v, 8a 1.2mhz step-down regulator 8 _______________________________________________________________________________________ pin description pin name function 1, 2, 3, 34, 35, 36 pgnd power ground. all pgnd pins are internally connected. connect all pgnd pins externally to the power ground plane. 4 vdl 5v ldo output. vdl supplies the gate-drive current to the internal mosfets, and charges the bst capacitor. vdl requires at least a 2.2f ceramic bypass capacitor to pgnd. 5C8 in power-supply input. input supply range is from 4.5v to 14v. bypass with two 10f and a 0.1f ceramic capacitors to pgnd. see figure 1. 9vp input of the internal 5v ldo regulator. connect to in if a 5v supply is not available. connect to an external 5v supply to disable the internal 5v regulator. 10 vl 3.3v ldo for internal chip supply. bypass with a 1f ceramic capacitor to gnd. 11 ilim current-limit adjust. connect a resistor, r ilim , from ilim to gnd. i ilim = 1v / r ilim . i ilim determines the lx current-limit trip point. see the current limit section for more details. 12 freq oscillator frequency selection. connect a resistor from freq to gnd to set the internal oscillator frequency. see the frequency select (freq) section for more details. 13, 32 gnd analog circuit ground 14 refin external reference input. connect to an external reference. fb regulates to the voltage applied to refin. connect refin to ss to use the internal 0.6v reference. refin is internally pulled to gnd when the ic is in shutdown mode. 15 ss soft-start input. connect a capacitor from ss to gnd to set the startup time. see the soft-start and refin section for details. 16 comp regulator compensation. connect the necessary compensation network from comp to fb. comp is internally pulled to gnd when the ic is in shutdown mode. 17 fb feedback input. connect to the center tap of an external resistor-divider from the output to gnd to set the output voltage. see the compensation design section for more details. 18 pwrgd power-good output. open-drain output that is high impedance when v fb 90% of v refin and v refin > 540mv. pwrgd is internally pulled low when the ic is in shutdown mode, or when v vdl , v in , or v vl is below the uvlo threshold, or the ic is in thermal shutdown. 19 syncout oscillator output. the syncout output is 180 out-of-phase from the internal oscillator to facilitate running a second regulator out-of-phase to reduce input ripple. 20 sync synchronization input. synchronize to an external clock with a frequency of 250khz to 1.2mhz. connect sync to gnd to disable the synchronization function. 21 bst high-side mosfet driver supply. bypass bst to lx with a 0.22f ceramic capacitor. 22C29 lx inductor connection. all lx pins are internally connected together. connect all lx pins to the switched side of the inductor. lx is high impedance when the ic is in shutdown mode. 30, 33 n.c. not internally connected 31 en enable input. logic input to enable/disable the max8654. drive en high to enable the ic. drive en low to place the ic in a low-power shutdown mode. ep exposed pad. connect to a large pgnd ground plane to optimize thermal performance. ep is internally connected to gnd and pgnd.
max8654 12v, 8a 1.2mhz step-down regulator _______________________________________________________________________________________ 9 en vl control logic bst vp ilim freq sync pwrgd gnd in comp pwm comparator ss fb refin pgnd vdl max8654 syncout oscillator error amplifier 0.54v refin 90% refin fb shutdown control uvlo circuitry thermal shutdown bias generator vl reg vdl reg ilim threshold voltage reference soft-start comp low detector lx lx lx current-limit comparator bst capacitor charging switch shdn 1v p-p block diagram
max8654 12v, 8a 1.2mhz step-down regulator 10 ______________________________________________________________________________________ detailed description the max8654 high-efficiency, voltage-mode switching regulator is capable of delivering up to 8a of output current. the max8654 provides output voltages from 0.6v to 0.85 x v in from 4.5v to 14v input supplies, mak- ing them ideal for on-board point-of-load applications. the output voltage accuracy is better than 1% over temperature. the max8654 allows for all ceramic-capacitor designs and faster transient responses. the device is available in a 6mm x 6mm 36-pin tqfn-ep package. the syncout function allows end users to operate two max8654s at the same switching frequency with 180 out-of-phase operation to minimize the input ripple current, conse- quently reducing the input capacitance requirements. the refin function makes the max8654 an ideal candi- date for ddr and tracking power supplies. using inter- nal low r ds(on) n-channel mosfets for both high- and low-side switches maintains high efficiency at both heavy load and high switching frequencies. the max8654 uses voltage-mode control architecture with a high-bandwidth (20mhz) error amplifier. the volt- age-mode control architecture allows up to 1.2mhz switching, reducing board area. the op-amp voltage error amplifier works with type 3 compensation to fully utilize the bandwidth of the high-frequency switching to obtain fast transient response. adjustable soft-start time provides flexibility to minimize input startup inrush cur- rent. the open-drain power-good (pwrgd) output goes high impedance when the output reaches 90% of its regulation point. max8654 in vp 0.1 f 3.57k ? 1 f 2.2 f 100k ? 75k ? 10 f 1.0 h 0.22 f 2 x 22 f 1nf bst vdl input 4.5v to 14v lx en pgnd comp fb sync syncout pwrgd gnd vl vl ilim refin ss freq 10 f 0.022 f in 10nf 22pf 4.99k ? 100 ? 20k ? 1.1k ? vl output 3.3v, 8a figure 1. typical application circuit, 3.3v, 8a, 500khz
max8654 12v, 8a 1.2mhz step-down regulator ______________________________________________________________________________________ 11 controller function the controller logic block is the central processor that determines the duty cycle of the high-side mosfet under different line, load, and temperature conditions. under normal operation, where the current-limit and temperature protection are not triggered, the controller logic block takes the output from the pwm comparator and generates the driver signals for both high-side and low-side mosfets. the break-before-make logic and the timing for charging the bootstrap capacitors are calculated by the controller logic block. the error signal from the voltage-error amplifier is compared with the ramp signal generated by the oscillator at the pwm comparator, and thus the required pwm signal is pro- duced. the high-side switch is turned on at the begin- ning of the oscillator cycle and turns off when the ramp voltage exceeds the v comp signal or when the current- limit threshold is exceeded. the low-side switch is then turned on for the remainder of the oscillator cycle. current limit the max8654 adjustable current limit is set by a resis- tor, r ilim , connected from ilim to gnd. the current through r ilim determines the lx current-limit trip point: r ilim (k ? ) = 800 / i lxlim (a) where i lxlim is the lx current-limit threshold. the valid r ilim range is 40k ? to 200k ? . r ilim of 100k ? sets a typ- ical peak current limit of 8a, sourcing or sinking at lx. when current flowing out of lx exceeds this limit, the high-side mosfet turns off and the synchronous rectifier turns on. the synchronous rectifier remains on until the inductor current falls below the low-side cur- rent limit. this lowers the duty cycle and causes the output voltage to drop until the current limit is no longer exceeded. when the negative current limit is exceeded, the device turns off the synchronous rectifier, forcing the inductor current to flow through the high-side mosfet body diode, back to the input, until the beginning of the next cycle, or until the inductor current drops to zero. the max8654 uses a hiccup mode to prevent overheat- ing during short-circuit output conditions. the device enters hiccup mode when v fb drops below 420mv for more than 12s, pulling comp and refin low. the ic turns off for 900 clock cycles and then enters soft-start for 110 clock cycles. if the short-circuit condition remains, the ic shuts down for another 512 clock cycles. the ic repeats this behavior until the short-cir- cuit condition is removed. soft-start and refin the max8654 utilizes an adjustable soft-start function to limit inrush current during startup. an 8a (typ) cur- rent source charges an external capacitor connected to ss to increase the capacitor voltage in a controlled manner. the soft-start time is adjusted by the value of the external capacitor from ss to gnd. the required capacitance value is determined as: where t ss is the required soft-start time in seconds. the max8654 also features an external reference input (refin). the ic regulates fb to the voltage applied to refin. the internal soft-start is not available when using an external reference. a method of soft-start when using an external reference is shown in figure 2. when using an external reference, in order to avoid cur- rent limit during soft-start, care should be taken to ensure the following condition: where i out is the maximum output current, c out is the output capacitance, and i p-p is the peak-to-peak induc- tor ripple current. connect refin to ss to use the internal 0.6v reference. c dv dt ii i out refin out lxlim pp + max8654 12v, 8a 1.2mhz step-down regulator 12 ______________________________________________________________________________________ undervoltage lockout (uvlo) the uvlo circuitry inhibits switching when v in or v vdl is below 4.20v (typ) or v vl is below 3v. once these voltages are above the thresholds, uvlo clears and the soft-start function activates; 100mv of hysteresis is built in for glitch immunity. high-side mosfet driver supply (bst) the gate-drive voltage for the high-side, n-channel switch is generated by a flying capacitor boost circuit. the capacitor between bst and lx is charged from the vdl supply while the low-side mosfet is on. when the low-side mosfet is switched off, the stored voltage of the capacitor is stacked above lx to provide the neces- sary turn-on voltage for the high-side internal mosfet. frequency select (freq) the switching frequency in fixed-frequency pwm oper- ation is resistor programmable from 250khz to 1.2mhz. set the switching frequency of the ic with a resistor (r freq ) from freq to gnd. r freq is calculated as: where f s is the desired switching frequency in mhz. sync function (sync, syncout) the max8654 features a sync function that allows the switching frequency to be synchronized to any external clock frequency that is higher than the internal clock frequency. drive sync with a square wave at the desired synchronization frequency. a rising edge on sync triggers the internal sync circuitry. connect sync to gnd to disable the function and operate with the internal oscillator. the syncout output generates a clock signal that is 180 out-of-phase with its internal oscillator, or the sig- nal applied to sync. this allows for another max8654 to be synchronized 180 out-of-phase to reduce the input ripple current. power-good output (pwrgd) pwrgd is an open-drain output that goes high imped- ance once the soft-start ramp has concluded, provided v refin is above 0.54v and v fb is greater than 90% of v refin . pwrgd pulls low when v fb is less than 90% of v refin and v refin is less than 0.54v for 48 clock cycles. pwrgd is low during shutdown, when pulled up to v vl . shutdown mode drive en to gnd to shut down the ic and reduce qui- escent current to 10a (typ). during shutdown, the out- puts of the max8654 are high impedance. drive en high to enable the max8654. thermal protection thermal-overload protection limits total power dissipa- tion in the device. when the junction temperature exceeds t j = +165c, a thermal sensor forces the device into shutdown, allowing the die to cool. the ther- mal sensor turns the device on again after the junction temperature cools by 20c, causing a pulsed output during continuous overload conditions. the soft-start sequence begins after a thermal-shutdown condition. applications information vl and vdl decoupling to decrease the noise effects due to the high switching frequency and maximize the output accuracy of the max8654, decouple vdl with a minimum of 2.2f ceramic capacitor from vdl to pgnd. also, decouple vl with a 1f ceramic capacitor from vl to gnd. place these capacitors as close to the respective pins as pos- sible. inductor selection choose an inductor with the following equation: where lir is the ratio of the inductor ripple current to average continuous current at the minimum duty cycle. choose lir between 20% to 40% for best performance and stability. use a low-loss inductor with the lowest possible dc resistance that fits in the allotted dimensions. powered iron-ferrite core types are often the best choice for per- formance. with any core material, the core must be large enough not to saturate at the peak inductor cur- rent (i peak ). calculate i peak as follows: i lir xi peak out max =+ () () 1 2 l vxvv f x v x lir x i out in out s in out max = ? () () r f k freq s =? ? ? ? ? ? ? ? 52 63 1 005 ..
max8654 12v, 8a 1.2mhz step-down regulator ______________________________________________________________________________________ 13 output capacitor selection the key selection parameters for the output capacitor are capacitance, esr, esl, and voltage-rating require- ments. these affect the overall stability, output ripple voltage, and transient response of the dc-dc converter. the output ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitors esr, and the voltage drop due to the capacitors esl. calculate the output voltage ripple due to the output capacitance, esr, and esl as: where the output ripple due to output capacitance, esr, and esl is: the peak-to-peak inductor ripple current (i p-p ) is: use these equations for initial capacitor selection. determine final values by testing a prototype or an eval- uation circuit. a smaller ripple current results in less output voltage ripple. since the inductor ripple current is a factor of the inductor value, the output voltage rip- ple decreases with larger inductance. use ceramic capacitors for low esr and low esl at the switching frequency of the converter. the low esl and esr of ceramic capacitors make ripple voltages negligible. load-transient response depends on the selected out- put capacitance. during a load transient, the output instantly changes by esr x i load . before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. after a short time, the controller responds by regulating the output voltage back to its predetermined value. the controller response time depends on the closed-loop bandwidth. a higher bandwidth yields a faster response time, pre- venting the output from deviating further from its regu- lating value. see the compensation design section for more details. input capacitor selection the input capacitor reduces the current peaks drawn from the input power supply and reduces switching noise in the ic. the total input capacitance must be equal to or greater than the value given by the following equation to keep the input ripple voltage within specifi- cations and minimize the high-frequency ripple current being fed back to the input source: where v in_ripple is the maximum allowed input ripple voltage across the input capacitors and is recommend- ed to be less than 2% of the minimum input voltage. d is the duty cycle (v out / v in ) and t s is 1 / f s (switching frequency). the impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source but are instead shunted through the input capacitor. high source impedance requires high input capacitance. the input capacitor must meet the ripple-current requirement imposed by the switching currents. the rms input ripple current is given by: where i ripple is the input rms ripple current. compensation design the power-transfer function consists of one double pole and one zero. the double pole is introduced by the out- put filtering inductor l and the output filtering capacitor c o . the esr of the output filtering capacitor deter- mines the zero. the double pole and zero frequencies are given as follows: where r l is equal to the sum of the output inductors dcr and the internal switch resistance, r ds(on) . r o is the output load resistance, which is equal to the rated ff xlxc x r esr rr f x esr x c plc p lc o o ol z esr o 12 1 2 1 2 __ _ () == + + = i ixvxvv v ripple load out in out in = ? () c dxt xi v in min sout in ripple _ _ = i vv fxl x v v pp in out s out in ? = ? v i xc xf v i x esr v i t x esl ripple c pp out s ripple esr p p ripple esl pp on () () () = = = ? ? ? 8 vv v v ripple ripple c ripple esr ripple esl =+ + () ( ) ( )
max8654 12v, 8a 1.2mhz step-down regulator 14 ______________________________________________________________________________________ output voltage divided by the rated output current. esr is the total equivalent series resistance (esr) of the out- put filtering capacitor. if there is more than one output capacitor of the same type in parallel, the value of the esr in the above equation is equal to that of the esr of a single output capacitor divided by the total number of output capacitors. the high-switching frequency range of the max8654 allows the use of ceramic-output capacitors. since the esr of ceramic capacitors is typically very low, the fre- quency of the associated transfer function zero is higher than the unity-gain crossover frequency, f c , and the zero cannot be used to compensate for the double pole created by the output filtering inductor and capacitor. the double pole produces a gain drop of 40db and a phase shift of 180 per decade. the error amplifier must compensate for this gain drop and phase shift to achieve a stable high-bandwidth, closed-loop system. therefore, use type 3 compensation as shown in figure 3. type 3 compensation possesses three poles and two zeros with the first pole, f p1_ea , located at zero frequen- cy (dc). locations of other poles and zeros of the type 3 compensation are given by: the above equations are based on the assumptions that c1>>c2 and r3>>r2 are true in most applica- tions. placements of these poles and zeros are deter- mined by the frequencies of the double pole and esr zero of the power-transfer function. it is also a function of the desired closed-loop bandwidth. the following section outlines the step-by-step design procedure to calculate the required compensation components for the max8654. begin by setting the desired output voltage. the output voltage is set using a resistor-divider from the output to gnd with fb at the center tap (r3 and r4 in figure 3). calculate r4 as: the zero-cross frequency of the closed loop, f c , should be less than 20% of the switching frequency, f s . higher zero-cross frequency results in faster transient response. it is recommended that the zero-cross fre- quency of the closed loop should be chosen between 10% and 20% of the switching frequency. once f c is chosen, c1 is calculated from the following equation: due to the underdamped nature of the output lc dou- ble pole, set the two zero frequencies of the type 3 compensation less than the lc double-pole frequency in order to provide adequate phase boost. set the two zero frequencies to 80% of the lc double-pole frequen- cy. hence: set the second compensation pole, f p2_ea , at f z_esr yields: set the third compensation pole at the switching fre- quency. calculate c2 as follows: c rf s 2 1 12 = r c x esr c o 2 3 = c xr x l x c x r esr rr oo lo 3 1 08 3 = + + . () r xc x l x c x r esr rr oo lo 1 1 08 1 = + + . () c xv xxrx r r f in l o c 1 1 5625 231 = + . () r r v out 4 06 3 06 = ? . . f xr xc f xr x c f xr x c f xr x c zea zea pea pea 1 2 3 2 1 211 1 233 1 212 1 223 _ _ _ _ = = = = max8654 comp fb lx l c out r2 r3 c3 c1 c2 r1 r4 v out figure 3. type 3 compensation network
max8654 12v, 8a 1.2mhz step-down regulator ______________________________________________________________________________________ 15 the above equations provide accurate compensation when the zero-cross frequency is significantly higher than the double-pole frequency. when the zero-cross frequency is near the double-pole frequency, the actual zero-cross frequency is higher than the calculated fre- quency. in this case, lowering the value of r1 reduces the zero-cross frequency. also, set the third pole of the type 3 compensation close to the switching frequency if the zero-cross frequency is above 200khz to boost the phase margin. note that the value of r4 can be altered to make the values of the compensation components practical. the recommended range for r3 is 2k ? to 10k ? . pcb layout considerations and thermal performance careful pcb layout is critical to achieve clean and sta- ble operation. it is highly recommended to duplicate the max8654 ev kit layout for optimum performance. if deviation is necessary, follow these guidelines for good pcb layout: 1) connect input and output capacitors, v vp and v vdl capacitors, to the power ground plane; connect all other capacitors to the signal ground plane. 2) place capacitors on v v p , v in , v vl , v vdl , and ss as close as possible to the ic and its corresponding pin using direct traces. keep power ground plane (con- nected to pgnd) and signal ground plane (connect- ed to gnd) separate. 3) keep the high-current paths as short and wide as possible. keep the path of switching current short and minimize the loop area formed by lx, the out- put capacitors, and the input capacitors. 4) connect in, lx, and pgnd separately to a large copper area to help cool the ic to further improve efficiency and long-term reliability. 5) ensure all feedback connections are short and direct. place the feedback resistors and compensa- tion components as close to the ic as possible. 6) route high-speed switching nodes, such as lx, away from sensitive analog areas (fb, comp). power-stage transfer function double pole first and second zeros second pole third pole open-loop gain esr zero gain (db) f compensation transfer function figure 4. transfer function for type 3 compensation
max8654 chip information process: bicmos 12v, 8a 1.2mhz step-down regulator 16 ______________________________________________________________________________________ tqfn max8654 top view lx lx lx lx sync syncout lx bst lx pgnd vdl in in in vp pgnd 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 28 29 30 31 32 33 34 35 36 27 26 25 24 23 22 21 20 19 refin ss comp pwrgd gnd freq ilim vl pgnd pgnd n.c. gnd en n.c. lx lx pgnd in fb pgnd pin configuration package type package code outline no. land pattern no. 36 tqfn t3666+3 21-0141 90-0050 package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status.
max8654 12v, 8a 1.2mhz step-down regulator maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 17 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 8/06 initial release 1 4/08 updated ordering information, pin description , and package information . 1, 8, 14, 16 2 7/09 updated current limit and input capacitor selection sections. 11, 13 3 6/11 updated absolute maximum ratings and electrical characteristics . 2, 3

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